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| Winbond SMBus GPIO Controller W83L603G W83L604G Revision: 1.0 Date: August 2006 W83L603G/W83L604G W83L603G/W83L604G Datasheet Revision History PAGES DATES VERSION WEB VERSION MAIN CONTENTS 1 N.A. Aug./06 1.0 1.0 Initial Version for customer -I- Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G Table of Contents1. 2. GENERAL DESCRIPTION ......................................................................................................... 1 FEATURES ................................................................................................................................. 1 2.1 2.2 3. 4. General Features .....................................................................................................................1 Key Specifications ....................................................................................................................1 PIN CONFIGURATION ............................................................................................................... 2 PIN DESCRIPTION..................................................................................................................... 3 4.1 4.2 W83L603G ...............................................................................................................................3 W83L604G ...............................................................................................................................4 5. 6. ARCHITECTURE DESCRIPTION .............................................................................................. 5 FUNCTION DESCRIPTIONS.................................................................................................... 10 6.1 Access Interface.....................................................................................................................10 6.1.1 6.1.2 Write a data into W83L603G/W83L604G register ........................................................10 Read a data from W83L603G/W83L604G register.......................................................10 GPO output ..................................................................................................................11 INT output.....................................................................................................................11 GPI interrupt status.......................................................................................................11 6.2 GPI/O Application Mode: .......................................................................................................11 6.2.1 6.2.2 6.2.3 7. DC AND AC SPECIFICATION.................................................................................................. 12 7.1 7.2 7.3 7.4 Absolute Maximum Ratings ...................................................................................................12 Power Supply Current Consumption .....................................................................................12 DC Characteristics .................................................................................................................12 AC Characteristics..................................................................................................................14 8. 9. 10. 11. PACKAGE DIMENSION OUTLINE........................................................................................... 15 ORDERING INFORMATION..................................................................................................... 17 HOW TO READ THE TOP MARKING...................................................................................... 17 TYPICAL APPLICATION CIRCUIT........................................................................................... 18 - II - W83L603G/W83L604G 1. GENERAL DESCRIPTION The W83L603G & W83L604G are general purpose input/output ICs with SMBusTM. W83L603G provides 8 GPI/O pins, W83L604G provides 14 GPI/O pins. W83L603G & W83L604G both provide SMBusTM address setting pins to set the address during power- on reset or from external reset. W83L603G / W83L604G SMBusTM Address is: 0 0 1 1 A2 A1 A0 R/W W83L603G & W83L604G also provide an interrupt to inform system that a transition occurs on general purpose input pins. By W83L603G & W83L604G, flashing LED output and beep function are also supported. The part number with an affix of "G" is the Lead-free package product. 2. FEATURES 2.1 * * * * * * * * * * * General Features SMBusTM Compliance with 3.3V Voltage Levels Flexible GPIO Pin Support, W83L603G Provides 8 pins, W83L604G Provides 14 pins. Interrupt Notification Support for System Event Occurs Support General Purpose Output Setting for Level or Pulse Mode Support Interrupt Output Setting for Level or Pulse mode Support Internal Power-on Reset or External RST# Pin Reset. Support Flashing LED Output Support PC Beep Output Chip Power down mode support 14-SOP Lead-free Package for W83L603G (RoHS Compliable) 20-SSOP Lead-free Package for W83L604G (RoHS Compliable) 2.2 * * * Key Specifications Supply Voltage is 3.3V Operating Supply Current is 150 uA typ. Operating Temperature is from 0 C to 70 C -1- Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G 3. PIN CONFIGURATION -2- W83L603G/W83L604G 4. PIN DESCRIPTION INts I/OD12ts I/O12t I/O(D)16t I/O(D)12t OD12 TTL level Schmitt-trigger input pin TTL level bi-directional pin open drain output with 12 mA sink capability and schmitttrigger level input TTL level bi-directional pin bi-directional output with 12 mA source-sink capability TTL level bi-directional pin bi-directional (or open drain) output with 16 mA (source-) sink capability TTL level bi-directional pin bi-directional (or open drain) output with 12 mA (source-) sink capability Open drain output pin with 12 mA sink capability 4.1 PIN W83L603G SYMBOL I/O FUNCTION 1 2 3 4 5 6 7 8 9 SCL SDA GP10/LED0 GP11/LED1 GP12/LED2 GP13/LED3 VSS GP14/BEEP GP15 / A2 INts I/OD12ts I/O(D)16t I/O(D)16t I/O(D)16t I/O(D)16t PWR I/O(D)16t I/O12t SMBus Clock. SMBus bi-directional Data. General Purpose I/O. ; LED output General Purpose I/O. ; LED output General Purpose I/O. ; LED output General Purpose I/O. ; LED output Power Pin. General Purpose I/O. ; BEEP output General Purpose I/O.; Strapping pin for SMBus address bit 2, this pin is internal weak pull down during hardware reset. General Purpose I/O.; Strapping pin for SMBus address bit 1, this pin is internal weak pull down during hardware reset. General Purpose I/O.; Strapping pin for SMBus address bit 0, this pin is internal weak pull down during hardware reset. Auto-generated Interrupt signal when detecting a transition on GP inputs. System reset signal input. Low level must be greater than 0.1uS. Power Pin. 10 GP16 / A1 I/O12t 11 12 13 14 GP17 / A0 INT# RST# 3VDD I/O12t OD12 INts PWR -3- Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G 4.2 PIN W83L604G SYMBOL I/O FUNCTION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SCL SDA GP10/LED0 GP11/LED1 GP12/LED2 GP13/LED3 VSS GP20 GP21 GP22 GP23 GP24 GP25 GP14/BEEP GP15 / A2 INts I/OD12ts I/O(D)16t I/O(D)16t I/O(D)16t I/O(D)16t PWR I/O(D)12t I/O(D)12t I/O(D)12t I/O(D)12t I/O(D)12t I/O(D)12t I/O(D)16t I/O12t SMBus Clock. SMBus bi-directional Data. General Purpose I/O. ; LED output General Purpose I/O. ; LED output General Purpose I/O. ; LED output General Purpose I/O. ; LED output Power Pin. General Purpose I/O. General Purpose I/O. General Purpose I/O. General Purpose I/O. General Purpose I/O. General Purpose I/O. General Purpose I/O. ; BEEP output General Purpose I/O.; Strapping pin for SMBus address bit 2, this pin is internal weak pull down during hardware reset. General Purpose I/O.; Strapping pin for SMBus address bit 1, this pin is internal weak pull down during hardware reset. General Purpose I/O.; Strapping pin for SMBus address bit 0, this pin is internal weak pull down during hardware reset. Auto-generated Interrupt signal when detecting a transition on GP inputs. System reset signal input. Low level must be greater than 0.1uS. Power Pin. 16 GP16 / A1 I/O12t 17 18 19 20 GP17 / A0 INT# RST# 3VDD I/O12t OD12 INts PWR -4- W83L603G/W83L604G 5. ARCHITECTURE DESCRIPTION Register 00h - GP1 input port register BIT 7 6 5 4 3 2 1 0 R/W RO RO RO RO RO RO RO RO *This register reflects the respective GPI1x pin level. Register 01h - GP1 output port register BIT 7 6 5 4 3 2 1 0 R/W Default RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 Register 02h - GP1 Polarity Inversion register BIT 7 6 5 4 3 2 1 0 R/W Default RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 *Refer to Section 6.2.1 for respective GPO1x pin type implementation. Register 03h - GP1 input/output configuration register BIT 7 6 5 4 3 2 1 0 R/W Default RW 1 RW 1 RW 1 RW 1 RW 1 RW 1 RW 1 RW 1 *This register configures the respective GPIO1x pin as input mode ("1"; by default) or output mode ("0"). Register 04h - GP1 output style register BIT 7 6 5 4 3 2 1 0 R/W Default RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 *This register configures the respective GPO1x pins as level ("0"; by default) or pulse ("1") output style. *Set output port register (CR01) to "0" before switch the output style to pulse mode. Register 05h - GP1 output mode register BIT R/W Default 7 RFU 0 6 RW 0 5 RW 0 4 RW 0 3 RW 0 2 RW 0 1 RW 0 0 RW 0 -5- Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G Bit4-Bit0: Configures the respective GPO1x output pads function as Open-drain ("0"; by default) or Pushpull ("1") mode. Bit6-5: GP14 / BEEP multi-function configuration register =11, BEEP frequency = 4KHz; tone = 250 Hz. =10, BEEP frequency = 2KHz; tone = 10 Hz. =01, BEEP frequency = 1KHz / 500 Hz; tone= 1 Hz. =00, BEEP function is disabled on GP14. Bit7: Reserved for future use. Register 06h - GP1 interrupt control register BIT 7 6 5 4 3 2 1 0 R/W Default RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 * This register configures the respective GPI1x pin interrupt control as disable ("0"; by default) or enable ("1"). *Clear interrupt status register (CR07) before set to enable. Register 07h - GP1 interrupt status register BIT 7 6 5 4 3 2 1 0 R/W R/clr R/clr R/clr R/clr R/clr R/clr R/clr R/clr *The registers are read clear. *Refer to Section 6.2.3 for implementation. Register 08h - GP11-GP13 / LED multi-function configuration register BIT 7 6 5 4 3 2 1 0 R/W Default RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 Bit7-6: GP13 / LED multi-function configuration register =11, GP13 functions LED output of 2Hz clock, 50% duty cycle. =10, GP13 functions LED output of 1Hz clock, 50% duty cycle. =01, GP13 functions LED output of 1/2 Hz clock, 50% duty cycle. =00, LED function is disabled on GP13. (Default) Bit5-4: GP12 / LED multi-function configuration register =11, GP12 functions LED output of 2Hz clock, 50% duty cycle. =10, GP12 functions LED output of 1Hz clock, 50% duty cycle. =01, GP12 functions LED output of 1/2 Hz clock, 50% duty cycle. =00, LED function is disabled on GP12. (Default) Bit3-2: GP11 / LED multi-function configuration register =11, GP11 functions LED output of 2Hz clock, 50% duty cycle. =10, GP11 functions LED output of 1Hz clock, 50% duty cycle. =01, GP11 functions LED output of 1/2 Hz clock, 50% duty cycle. =00, LED function is disabled on GP11. (Default) Bit1-0: GP10 / LED multi-function configuration register =11, GP10 functions LED output of 2Hz clock, 50% duty cycle. =10, GP10 functions LED output of 1Hz clock, 50% duty cycle. =01, GP10 functions LED output of 1/2 Hz clock, 50% duty cycle. =00, LED function is disabled on GP10. (Default) -6- W83L603G/W83L604G Register 09h - GP1 input latch data register BIT 7 6 5 4 3 2 1 0 R/W Default RO 0 RO 0 RO 0 RO 0 RO 0 RO 0 RO 0 RO 0 *This register reflects the latch value of GP1x pins during hardware reset. Register 10h - GP2 input port register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W NA RO RO RO RO RO RO *This register reflects the respective GPI2x pin level. Register 11h - GP2 output port register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W Default NA RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 Register 12h - GP2 Polarity Inversion register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W Default NA RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 *Refer to Section 6.2.1 for respective GPO2x pin type implementation. Register 13h - GP2 input/output configuration register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W Default NA RW 1 RW 1 RW 1 RW 1 RW 1 RW 1 *This register configures the respective GPIO2x pin as input mode ("1"; by default) or output mode ("0"). Register 14h - GP2 output style register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W Default NA RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 *This register configures the respective GPO2x pins as level ("0"; by default) or pulse ("1") output style. *Set output port register (CR11) to "0" before switch the output style to pulse mode. -7- Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G Register 15h - GP2 output mode register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W Default NA RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 *This register configures the respective GPO2x output pads function as Open-drain ("0"; by default) or Push-pull ("1") mode. Register 16h - GP2 interrupt control register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W Default NA RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 * This register configures the respective GPI2x pin interrupt control as disable ("0"; by default) or enable ("1"). *Clear interrupt status register (CR17) before set to enable. Register 17h - GP2 interrupt status register (for W83L604G only) BIT 7 6 5 4 3 2 1 0 R/W NA R/clr R/clr R/clr R/clr R/clr R/clr *The registers are read clear. *Refer to Section 6.2.3 for implementation. Register 20h - Chip ID (High byte; 95h for W83L604G, 96h for W83L603G) BIT 7 6 5 4 3 2 1 0 R/W Default RO 1 RO 0 RO 0 RO 1 RO 0 RO 1 RO 0/1 RO 1/0 Register 21h - Chip ID (Low byte; 92h) BIT 7 6 5 4 3 2 1 0 R/W Default RO 1 RO 0 RO 0 RO 1 RO 0 RO 0 RO 0 RO 1 -8- W83L603G/W83L604G Register 22h - Global configuration register BIT 7 6 5 4 3 2 1 0 R/W Default WO 0 RFU 0 RW 0 RW 0 RW 0 RW 0 RW 0 RW 0 Bit7: Write "1" to issue a software reset. Bit6: Reserved for future use. Bit5: Low power enable bit. The internal clock generator will shutdown while the bit is set. In the lowpower mode, the functions of SMBus, LED, BEEP, and all signals configured as the pulse mode will NOT work. Bit4: Wake-up enable. If the bit is set, low-power enable bit (Bit-5) can be cleared whenever interrupt event is triggered on GPI pin. To enable the interrupt control register (CR06,CR16) is necessary. Bit3: Interrupt polarity bit. Refer to Section 7.2.2 for INT pin type implementation. Bit2: This bit configures the INT signal output as level ("0"; by default) or pulse ("1") style. Bit1: GP2 registers mask enable. Set "1" will mask the RST# signal for all GP2 registers. (10h ~ 17h) Bit0: GP1 registers mask enable. Set "1" will mask the RST# signal for all GP1 registers. (00h ~ 08h) *Bit1 and Bit0 will not be reset by RST#. -9- Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G 6. FUNCTION DESCRIPTIONS 6.1 Access Interface W83L603G/W83L604G provides a two-wired serial interface which is compliant with SMBusTM Write Byte and Read Byte protocol. 6.1.1 Write a data into W83L603G/W83L604G register 6.1.2 Read a data from W83L603G/W83L604G register - 10 - W83L603G/W83L604G 6.2 6.2.1 GPI/O Application Mode: GPO output OUTPUT PORT REGISTER Take Reference Table for GPO Style and Polarity Function. GPO OUTPUT STYLE POLARITY OUTPUT VALUE AT PIN WAVE 0 Level 1 Pulse 0 1 0 1 0 1 Write 1 Write 1 0 1 1 0 Active Active *The GPO Pulse Mode output waveform width is 0.5uS. 6.2.2 INT output Take Reference Table for INT Output Mode and Polarity Function. INT OUTPUT MODE POLARITY OUTPUT WAVE Level Pulse 0 1 0 1 0 1 Low Pulse High Pulse *In Level mode, if INT is activated, it will be de-activated when interrupt status registers are read. *In Pulse mode, interrupt will be activated again unless all enabled interrupt status registers are read. *The INT Pulse Mode output waveform width is 0.25uS. 6.2.3 GPI interrupt status Once a transition occurs at GPI input pins, interrupt status registers (CR07, CR17) will be set. At the mean time, if interrupt function is enable (CR06, CR16), the INT pin will generate an interrupt waveform. Reading these interrupt status registers will self clear and reset interrupt. If an interrupt occurs but never read the interrupt status registers, the interrupt will not be generated again. - 11 - Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G 7. DC AND AC SPECIFICATION 7.1 Absolute Maximum Ratings PARAMETER RATING UNIT Power Supply Voltage Input Voltage Operating Temperature Storage Temperature 3.3 10% 3.3 10% 0 to +70 -55 to +150 V V C C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. 7.2 Power Supply Current Consumption PARAMETER TYPICAL UNIT (Ta = 0 C to 70 C, VDD = 3.3V 10%, VSS = 0V) Normal Mode Power Down Mode 150 10 uA uA Note: The Typical value is measured by whole GPIO pins output without load. 7.3 DC Characteristics (Ta = 0 C to 70 C, VDD = 3.3V 10%, VSS = 0V) INts - TTL level schmitt-trigger input pin PARAMETER Input Low Voltage Input High Voltage Input High Leakage Input Low Leakage Input Low Voltage Input High Voltage Output Low Voltage Input High Leakage Input Low Leakage SYM. VIL VIH ILIH ILIL VIL VIH VOL ILIH ILIL 2.0 0.4 +10 -10 2.0 +10 -10 0.8 MIN. TYP. MAX. 0.8 UNIT V V A A V V V A A CONDITIONS VDD = 3.3 V VDD = 3.3 V VIN = VDD VIN = 0 V VDD = 3.3 V VDD = 3.3 V IOL = 12 mA VIN = VDD VIN = 0 V I/OD12ts - TTL level bi-direction pin with 12mA sink capability and schmitt-trigger input - 12 - W83L603G/W83L604G DC Characteristics , continued. I/O12t - TTL level bi-direction pin with 12mA source-sink capability Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Input High Leakage Input Low Leakage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Input High Leakage Input Low Leakage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Input High Leakage Input Low Leakage Output Low Voltage VIL VIH VOL VOH ILIH ILIL VIL VIH VOL VOH ILIH ILIL VIL VIH VOL VOH ILIH ILIL VOL 2.4 +10 -10 0.4 2.0 0.4 2.4 +10 -10 0.8 2.0 0.4 2.4 +15 -15 0.8 2.0 0.4 0.8 V V V V A A V V V V A A V V V V A A V VDD = 3.3 V VDD = 3.3 V IOL = 12 mA IOH = 12 mA VIN = 3.3 V VIN = 0 V VDD = 3.3 V VDD = 3.3 V IOL = 16 mA IOH = 16 mA VIN = 3.3 V VIN = 0 V VDD = 3.3 V VDD = 3.3 V IOL = 12 mA IOH = 12 mA VIN = 3.3 V VIN = 0 V IOL = 12 mA I/O(D)16t - TTL level bi-direction pin with 16mA source-sink capability I/O(D)12t - TTL level bi-direction pin with 12mA source-sink capability OD12 - open-drain output pin with 12mA sink capability - 13 - Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G 7.4 AC Characteristics Serial Bus Timing Diagram t SCL t tR F SCL t HD;STA t SU;DAT t SU;STO SDA IN VALID DATA t HD;DAT SDA OUT Serial Bus Timing Diagram Serial Bus Timing PARAMETER SYMBOL MIN. MAX. UNIT SCL clock period Start condition hold time Stop condition setup-up time DATA to SCL setup time DATA to SCL hold time SCL and SDA rise time SCL and SDA fall time t SCL tHD;STA tSU;STO tSU;DAT tHD;DAT tR tF - 10 4.7 4.7 120 5 1.0 300 uS uS uS nS nS uS nS - 14 - W83L603G/W83L604G 8. PACKAGE DIMENSION OUTLINE Winbond provides two packages for customers thank contain 14-SOP and 20-SSOP. 14L SOP-150mil for W83L603G 14 8 c E HE L 1 D 7 0.25 O A Y SEATING PLANE b e A1 GAUGE PLANE Control demensions are in milmeters . SYMBOL A A1 b c E D e HE Y L DIMENSION IN MM MAX. MIN. 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 3.80 4.00 8.75 8.55 1.27 BSC 6.20 5.80 0.10 1.27 0.40 0 8 DIMENSION IN INCH MIN. MAX. 0.053 0.069 0.010 0.004 0.013 0.020 0.008 0.010 0.150 0.157 0.344 0.337 0.050 BSC 0.228 0.016 0 0.244 0.004 0.050 8 - 15 - Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G 20L SSOP-209mil for W83L604G D 20 11 DTEAIL A HE E 1 10 A2 SEATING PLANE A L1 L b SEATING PLANE Y e b A1 DETAIL A SYMBOL DIMENSION IN MM MIN. NOM MAX. DIMENSION IN INCH NOM MAX. MIN. A A1 A2 b c D E HE e L L1 Y 2.00 0.05 1.65 0.22 0.09 6.90 5.00 7.40 0.55 1.75 1.85 0.38 0.25 7.50 5.60 8.20 0.95 0.10 8 0.002 0.065 0.009 0.004 0.272 0.197 0.291 0.021 0.069 0.079 0.073 0.015 0.010 0.295 0.220 0.323 0.037 0.004 8 7.20 5.30 7.80 0.65 0.75 1.25 0.0256 0.283 0.209 0.307 0.030 0.050 0 0 - 16 - W83L603G/W83L604G 9. ORDERING INFORMATION PART NUMBER PACKAGE TYPE PRODUCTION FLOW W83L603G W83L604G 14-SOP (Leadfree) 20-SSOP (Leadfree) Commercial, 0C to +70C Commercial, 0C to +70C 10. HOW TO READ THE TOP MARKING W83L603G 212345678 524GB Left line: Winbond logo 1st line: W83L603G - the part number for Leadfree product 2nd line: Chip lot no 3rd line: Tracking code 524 G B 524: packages assembled in Year 05', week 24 G: assembly house ID; O means OSE, G means GR, etc. B: the IC version W83L604G 212345678 524GB Left line: Winbond logo 1st line: W83L604G - the part number for Leadfree product 2nd line: Chip lot no 3rd line: Tracking code 524 G B 524: packages assembled in Year 05', week 24 G: assembly house ID; O means OSE, G means GR, etc. B: the IC version - 17 - Publication Release Date: August 2006 Revision 1.0 W83L603G/W83L604G 11. TYPICAL APPLICATION CIRCUIT 3VCC 3VCC 3VCC 3VCC U1 R2 4.7K R4 0 SY STEM_SCLK SY STEM_SDAT 0 R5 C4 10P C5 10P SCLK SDAT R3 4.7K SCLK SDAT GP10 GP11 GP12 GP13 1 2 3 4 5 6 7 SCLK 3VDD SDAT RST# LED0/GP10 INT# LED1/GP11 A0/GP17 LED2/GP12 A1/GP16 LED3/GP13 A2/GP15 VSS BEEP/GP14 W83L603S 32 31 30 29 28 27 26 RST# INT# GP17 GP16 GP15 GP14 RST# C2 10U C3 0.1U C1 1U R1 10K OR RST# SY STEM_RST# *Connect to System RESET control output. *RST# source low level has to greater than 0.1uS width. SMBus Interface 3VCC 3VCC U2 SCLK SDAT GP10 GP11 GP12 GP13 GP20 GP21 GP22 1 2 3 4 5 6 7 8 9 10 SCLK 3VDD SDAT RST# LED0/GP10 INT# LED1/GP11 A0/GP17 LED2/GP12 A1/GP16 LED3/GP13 A2/GP15 VSS BEEP/GP14 GP20 GP25 GP21 GP24 GP22 GP23 W83L604R 3VCC 3VCC 3VCC BUZZER_VCC R7 10K R8 10K R9 10K R10 150 32 31 30 29 28 27 26 25 24 23 RST# INT# GP17 GP16 GP15 GP14 GP25 GP24 GP23 R6 4.7K C6 10U C7 0.1U INT# SY STEM_INT# *Connect to System interrupt input. PC BEEP GP17 GP16 GP15 A0 A1 SMBUS ADDRESS SELECTION A2 R11 330 GP10 1 2 LED D1 3VCC R12 330 GP11 1 2 LED 3VCC R13 330 D3 2 LED GP13 1 R14 330 D4 2 LED D2 3VCC *Example for set the GP14 to GPO push-pull type. GP14 Q1 NPN BUZZER1 AC-1205G *Mount the pull up resistor to set the Address Bit to 1. 3VCC GP12 1 *The W83L603S/W83L604R GP14 pin default setting is GP Input , the Buzzer application circuit is option to selected Buzzer type and GP14 type. LED GROUP Title Size B Date: inbond |